SHA40 - Connector Pin Assignment


Figure 1. Connector, Front view.

Connector A

Pin Name SPI I2C JTAG SWD UART -
1 GND Common / GND
2 VUSB USB 5V
Port 1
3 GPIO00 SCK SCL TCK SWDCLK TXD  
4 GPIO01 MOSI SDA (1) TDI SWDIO (2) RXD  
5 GPIO02 MISO SDA (1) TDO SWDIO (2) RTS  
6 GPIO03 GPIO or CS GPIO TMS GPIO CTS  
7 GPIO04 GPIO or CS GPIO GPIO GPIO DTR  
8 GPIO05 GPIO or CS GPIO GPIO GPIO DSR  
9 GPIO06 GPIO or CS GPIO GPIO GPIO DCD  
10 GPIO07 GPIO or CS GPIO GPIO GPIO RI  
Port 2
11 GPIO08 SCK SCL TCK SWDCLK TXD  
12 GPIO09 MOSI SDA (1) TDI SWDIO (2) RXD  
13 GPIO10 MISO SDA (1) TDO SWDIO (2) RTS  
14 GPIO11 GPIO or CS GPIO TMS GPIO CTS  
15 GPIO12 GPIO or CS GPIO GPIO GPIO DTR  
16 GPIO13 GPIO or CS GPIO GPIO GPIO DSR  
17 GPIO14 GPIO or CS GPIO GPIO GPIO DCD  
18 GPIO15 GPIO or CS GPIO GPIO GPIO RI  
Auxiliary GPIO
19 GPIO16 Auxiliary GPIO
20 GPIO17 Auxiliary GPIO
21 GPIO18 Auxiliary GPIO
22 GPIO19 Auxiliary GPIO
23 GPIO20 Auxiliary GPIO
24 GPIO21 Auxiliary GPIO
25 GPIO22 Auxiliary GPIO
26 GPIO23 Auxiliary GPIO

Notes:
(1) For correct I2C operation both SDA signals (pins 4 and 5) must be tied together. The Signalyzer H2 and H4 drives SCL and SDA line high during byte transfer.

(2) For correct SWD operation both SWDIO signals (pins 4 and 5) must be tied together.

Connector B

Pin Name SPI I2C JTAG SWD UART -
1 GND Common / GND
2 VUSB USB 5V
Port 3
3 GPIO00 - - - - TXD  
4 GPIO01 - - - - RXD  
5 GPIO02 - - - - RTS  
6 GPIO03 - - - - CTS  
7 GPIO04 - - - - DTR  
8 GPIO05 - - - - DSR  
9 GPIO06 - - - - DCD  
10 GPIO07 - - - - RI  
Port 4
11 GPIO08 - - - - TXD  
12 GPIO09 - - - - RXD  
13 GPIO10 - - - - RTS  
14 GPIO11 - - - - CTS  
15 GPIO12 - - - - DTR  
16 GPIO13 - - - - DSR  
17 GPIO14 - - - - DCD  
18 GPIO15 - - - - RI  
Auxiliary GPIO
19 GPIO16 Auxiliary GPIO
20 GPIO17 Auxiliary GPIO
21 GPIO18 Auxiliary GPIO
22 GPIO19 Auxiliary GPIO
23 GPIO20 Auxiliary GPIO
24 GPIO21 Auxiliary GPIO
25 GPIO22 Auxiliary GPIO
26 GPIO23 Auxiliary GPIO

Notes:
(1) For correct I2C operation both SDA signals (pins 4 and 5) must be tied together. The Signalyzer H2 and H4 drives SCL and SDA line high during byte transfer.

(2) For correct SWD operation both SWDIO signals (pins 4 and 5) must be tied together.